Job title: ASIC RTL IP Design Engineer, Devices and Services
Job description: experience 4 years of experience in IP or sub-system level RTL Design Experience with Verilog or System Verilog language… Experience with micro architecture design and system design Preferred qualifications: Experience with various quality checks…
Location: Bangalore, Karnataka
Job date: Thu, 12 May 2022 07:14:10 GMT
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